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Clean Energy Manufacturing Innovation Institute

Open Date: 05/09/2013

Close Date: 08/29/2013

Funding Organization: Office of Energy Efficiency and Renewable Energy

Funding Number: DE-FOA-0000683

Summary:

I. The purpose of this amendment is to make the following changes:

  1. Extend the Letter of Intent due date to July 16, 2013.
  2. Revise Section I . C. "Technology Topic Area Details: Wide Bandgap Semiconductor Power Electronic Devices" by inserting the following wording in paragraph 2 as underlined below: "Electricity is the fastest-growing form of end-use energy worldwide with 30% of all electric power currently generated using power electronics somewhere between the point of generation and distribution, and expected to grow to 80% by 2030. As identified in the 2012 DOE Quadrennial Technology Review, WBG semiconductor-based power electronics will enable more efficient distribution and use of electric power as well as generation of electrical energy from renewable sources. Silicon carbide (SiC) and gallium nitride (GaN) are beneficial for next generation power electronics to improve and accelerate both grid integration and interface of renewables, , deployment of electric drive vehicles, as well as, in the defense industrial base, industrial-scale variable-speed motors and data centers. Improved performance and increased energy savings of WBG-based power conversion will therefore support the President's goal to double American energy productivity by 2030 and also impac t the approximately 40 quadrillion Btu (quads) per year, or 40% of primary energy, used to produce electricity."
  3. Revise Section I . C. Technology Topic Area Details: "Wide Bandgap Semiconductor Power Electronic Devices" by inserting the following wording in paragraph 5 as underlined below: "Similar to the challenges that the domestic Si industry faced two decades ago, increased investment and competition from overseas threatens the existing U.S. foothold in the supply chain and future manufacturing and export opportunities. A WBG semiconductor Institute offers the opportunity to tackle this challenge by employing existing manufacturing capabilities, with relevant assets that may be underutilized in their present configuration, to revitalize geographic regions. For example, the transition to the current state-of-the-art Si wafers (12-inch), could permit the leveraging, with necessary modifications, of idle Si foundry lines utilized for the wafer sizes (6- and 8-inch) required to pursue WBG-based device maturation efforts, where approximately 90% of the processing steps are equivalent."
  4. Revise Section I . C. "Technology Topic Area Details: Wide Bandgap Semiconductor Power Electronic Devices" by inserting the following wording in paragraph 6 as underlined below: "The focus of an Institute in WBG semiconductor power electronics for device fabrication and manufacturing will require circuit design, packaging, and module manufacturing capabilities as well as wafer test metrology equipment to verify wafer quality throughout the photolithographic and chemical processing steps. Furthermore, the development of standard packaging technologies, modeling, and lifetime reliability studies, as well as a centralized testing capability for devices will reduce the need for duplicative capital investments from users. As such, an Institute should offer in-house design capabilities for users, as well as common fabrication and testing equipment for the community. The Institute is also envisioned to initiate and establish long-term device and system reliability testing, including simulation and modeling capabilities, to identify and couple failure mechanisms to device- and systems-level performance, as well as to benchmark and develop both testing and performance standards for the industry as a whole and the operational requirements necessary for the relevant applications, including industrial motor drives, electric drive vehicles, solar, and wind power conversion. In this role, the Institute could convene the community to undertake WBG technology and manufacturing roadmapping activities to translate recent accomplishments and plan future activities, similar to the International Technology Roadmap for Semiconductors (ITRS) and other such efforts. Competitively-selected projects utilizing the Institute's capabilities should include solving existing technical challenges in packaging and device design, such as gate drivers, that can then be translated into the Institute's knowledge base for testing and incorporating into end-systems."
  5. Revise Section I . C. "Technology Topic Area Details: Wide Bandgap Semiconductor Power Electronic Devices" by inserting the following wording in paragraph 7 as underlined below: "The Institute must possess a strong technical focus on GaN- and/or SiC-based device manufacturing with the potential for transformative technical and economic impact across multiple power electronics-based industries and markets. While an Institute can focus its manufacturing efforts at the device-level solely on GaN or SiC, depending on the extent to which the Institute focuses solely on discrete device technology and the degree to which power component integration and system testing are also included, both GaN- and SiC-based power conversion systems or products should be considered for evaluation and testing. Targeted technical and economic impacts are reduced energy use, cost, pollution, improved efficiency and product quality, and a more competitive and fully integrated domestic manufacturing supply chain to meet increasing global demand. An Institute and its members will need to be well integrated across the supply chain (Figure 2) to ensure wafers demonstrating the cu rrent state-of-the art growth technologies are utilized in its device design, fabrication, and testing activities. To ensure full supply chain integration, materials (substrate and epitaxy) manufacturers are not excluded from Institute membership. However, materials growth or wafer processing improvements within the context of materials growth (i.e. defect density reduction, film thickness, yield, and diameter increases) and including substrate, heteropitaxy and homoepitaxy growth improvements are excluded from the scope of this FOA and the Institute's purpose."
  6. Revise Section I . D. "Funding Opportunity Goals" by inserting the following wording in paragraphs 4, 5 and 6 as underlined below: "A definition of energy productivity is provided here in the context of this FOA. This information and definition is to be used for this FOA specifically and while this information relates to an overall national goal for energy productivity it is provided here for convenience to applicants while a complete, formal definition of the national goals for energy productivity is under development. For this FOA, energy productivity (EP) is defined as the economic value of relevant market sectors ($ Value Add) per unit energy (TBTU) on a cumulative basis over a ten year period. Energy consumption is to be calculated on a life cycle basis. To determine the increase in energy productivity, the energy productivity needs to be estimated for a baseline, "business as usual" scenario for economic output and energy consumption without the Institute is then compared to a scenario where the impact of the Institute activities are estimated for both economic output and energy consumption. On a 10 year basis: EP Baseline (EPB) No Institute = Cum.Value Add ($)B/Cum.Life Cycle Energy Consumption (TBTU)B ? EP Institute (EPI) Impact = Cum. Value Add ($)I/Cum. Life Cycle Energy Consumption (TBTU)I ? % EP Improvement = (EPB ? EPI)/EPB * 100% Applicants should make realistic estimates of the value of the economic impact the Institute and energy savings potential for technology advancements and must provide the justification for all estimates and assumptions.

II. All other parts of the FOA remain unchanged. The areas which have changed are highlighted in green within the Funding Opportunity Announcement.

I. The purpose of this amendment is to make the following changes:

  1. Revise Section IV B. Letter of Intent (Mandatory) as noted below: B. Letter of Intent (Mandatory) Applicants must submit a Letter of Intent by the Due Date set forth on the FOA cover page to be eligible to submit a Full Application. The Letter of Intent should not contain any proprietary or sensitive business information. Two steps are required to complete the Letter of Intent submission process. First, applicants need to create a Letter of Intent record in EERE Exchange by selecting the 'Apply' button next to the FOA; then populating the required information; and selecting the 'Create Letter of Intent' button at the bottom of the record. Note that a control number will be issued when an Applicant creates the Letter of Intent record in EERE Exchange. This control number must be included in the Letter of Intent document as described below, as well as in all the Full Application documents, as described in paragraph C. Secondly, the applicant must create a separate Letter of Intent document for email submission to EERE. The Letter of Intent must not exceed three (3) pages, including cover page, charts, graphs, maps, and photographs when printed using standard 8.5" by 11" paper with 1 inch margins (top, bottom, left, and right), single spaced. The font must not be smaller than 11 point. Do not include any Internet addresses (URLs) that provide information necessary to review the letter. Save the information in a single file named "Control_Institution_LetterofIntent.pdf." The Letter of Intent must include the following information: 1. Prime Applicant Name (Lead Organization) 2. Organization Director/technical lead for the Institute (Name, Phone Number and email address) 3. Anticipated team members (organizations) 4. Name of the proposed Institute 5. 5-10 keywords describing the focus of the Institute within the topic area 6. Estimated total DOE funding request 7. Description of the focus of the Institute within the topic area, potential impact of the Institute, technical objectives of the Institute, overall approach to achieve the goals of this FOA and high level summary of planned resources and facilities Letters of Intent must be submitted via email to the following email address FOA0000683@go.doe.gov .
  2. Revise Section IV E. Submission Dates and Times as noted below: E. Submission Dates and Times Applicants are responsible for meeting each submission deadline as set forth on the FOA cover page. Applicants should not wait until the last minute to begin the submission process. During the final hours before the submission deadlines, applicants may experience server/connection congestion that prevents them from completing the necessary steps in EERE-E Exchange to fully submit their applications. Therefore, Applicants are strongly encouraged to begin submitting their applications at least 48 hours in advance of the submission deadline. The Letter of Intent must be submitted via email to FOA0000683@go.doe.gov .
  3. Revise Section IV H. 1. Submission and Registration Requirements as noted below: H. Submission and Registration Requirements 1. Where to Submit LETTERS OF INTENT RECORDS MUST BE CREATED IN EERE EXCHANGE and SUBMITTED VIA EMAIL; FULL APPLICATIONS MUST BE SUBMITTED UNDER THIS ANNOUNCEMENT THROUGH EERE EXCHANGE at https://eere-exchange.energy.gov/ TO BE CONSIDERED FOR AWARD prior to the Application due date and time. You cannot submit a Letter of Intent or an Application through EERE Exchange unless you are registered. Please read the registration requirements below carefully and start the process immediately. Applications submitted by any other means will not be accepted. If you have problems completing the registration process or submitting your application, send an email to the EERE Exchange helpdesk at EERE-ExchangeSupport@hq.doe.gov. It is the responsibility of the applicant to verify successful transmission, prior to the Application due date and time.

The goal of this Funding Opportunity Announcement (FOA) is to establish a Clean Energy Manufacturing Innovation Institute (Institute) to support U.S. prosperity and security; and that will contribute to the creation of the National Network for Manufacturing Innovation (NNMI). The primary goals of the Institute are to revitalize American manufacturing and support domestic manufacturing competitiveness by driving innovation, and developing and accelerating adoption of next generation manufacturing technologies that will increase energy productivity, improve product quality, reduce cost, waste or pollution leading to increased domestic production capacity, jobs for American workers and regional economic development. The Institute established through this FOA will focus on wide bandgap (WBG) semiconductors for power electronic devices. Funding from this FOA (including required cost share) is not permitted for construction of new buildings or for major renovation of existing buildings. Allowable costs include those necessary to house the Institute (including a possible lease for the first five years of the project), to make minor renovations as needed, and to purchase research equipment and instrumentation.

For more information, see the full solicitation.

Last updated: 07/12/2013

Funding amounts and schedules are subject to change.

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